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Nexperia 74LV00PW,112, Quad 2-Input NAND Logic Gate, 14-Pin TSSOP

74LV00PW-112 Nexperia 74LV00PW,112, Quad 2-Input NAND Logic Gate, 14-Pin TSSOP
74LV00PW,112
Nexperia

Product Information

Dimensions:
5.1 x 4.5 x 0.95mm
Logic Family:
LV
Width:
4.5mm
Input Type:
CMOS
Maximum Low Level Output Current:
12mA
Maximum High Level Output Current:
-12mA
Maximum Propagation Delay Time @ Maximum CL:
31 ns @ 15 pF
Minimum Operating Supply Voltage:
1 V
Output Type:
Single Ended
Package Type:
TSSOP
Maximum Operating Temperature:
+125 °C
Number of Inputs per Gate:
2
Length:
5.1mm
Pin Count:
14
Maximum Operating Supply Voltage:
5.5 V
Mounting Type:
Surface Mount
Logic Function:
NAND
Height:
0.95mm
Minimum Operating Temperature:
-40 °C
Schmitt Trigger Input:
No
Number of Elements:
4
Propagation Delay Test Condition:
15pF
RoHs Compliant
Checking for live stock

This is Quad 2-Input NAND Logic Gate 14-Pin TSSOP manufactured by Nexperia. The manufacturer part number is 74LV00PW,112. The given dimensions of the product include 5.1 x 4.5 x 0.95mm. The logic family is lv. Furthermore, the product is 4.5mm wide. It carries cmos input type. On the other hand, it is featured with 12ma of max. low level output current. While a -12ma of maximum high level output current. It provides up to 31 ns @ 15 pf maximum propagation delay time. While its minimum operating supply voltage is 1 v. Furthermore, it has asingle ended output. The package is a sort of tssop. It has a maximum operating temperature of +125 °c. It contains 2 inputs per gate . Its accurate length is 5.1mm. It contains 14 pins. It has 5.5 v maximum operating supply voltage. The product is available in surface mount configuration. The primary function of logic includes nand. In addition, the height is 0.95mm. Whereas, the minimum operating temperature of the product is -40 °c. Schmitt Trigger Input - no. It carries 4 elements. Features 15pf of propagation delay test condition.

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74LV00PW Quad 2-input NAND Gate Data Sheet(Technical Reference)
pdf icon
ESD Control Selection Guide V1(Technical Reference)

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