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Products Found: 40

Showing Results For: Microprocessors

Microprocessors


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Rohs Verified
i.MX 6 Dual/6 Quad Applications Processors The i.MX 6 Dual/6 Quad Applications Processors feature advanced implementation of the quad ARM® Cortex®-A9 core which operates at speeds up to 1 GHz.The processors include a 64-bit DDR3/LVDDR3/LPDDR2-1066 memory interface as well as other interfaces for connecting WLAN, Bluetooth®, GPS, hard drive, displays and camera sensors. Other key features of the i.MX 6 Dual/6 Quad are 2D and 3D graphics, 3D 1080p video processing and integrated power management. Applications include netbooks, nettops, high-end mobile devices, high-end PDA's, high-end portable media players with HD video capability, gaming consoles and portable navigation devices. Multilevel memory system Smart speed technology Dynamic voltage and frequency scaling Interface flexibility Powerful graphics acceleration Advanced security
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Rohs Verified
i.MX 6 Dual/6 Quad Applications Processors The i.MX 6 Dual/6 Quad Applications Processors feature advanced implementation of the quad ARM® Cortex®-A9 core which operates at speeds up to 1 GHz.The processors include a 64-bit DDR3/LVDDR3/LPDDR2-1066 memory interface as well as other interfaces for connecting WLAN, Bluetooth®, GPS, hard drive, displays and camera sensors. Other key features of the i.MX 6 Dual/6 Quad are 2D and 3D graphics, 3D 1080p video processing and integrated power management. Applications include netbooks, nettops, high-end mobile devices, high-end PDA's, high-end portable media players with HD video capability, gaming consoles and portable navigation devices. Multilevel memory system Smart speed technology Dynamic voltage and frequency scaling Interface flexibility Powerful graphics acceleration Advanced security
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Renesas Electronics
Rohs Verified
The Renesas Electronics RZ/A1H is the premium full-featured part in the RZ/A1 family with an Arm Cortex-A9 core running at 400MHz and 10MB of on-chip SRAM. With 10MB on-chip SRAM, the RZ/A1H supports up to 2 displays with WXGA resolution without the need for external memory. It enables very compact embedded designs without the need to worry about memory procurement and memory EOL. Arm core link level 2 cache controller Media processing engine with NEON technology Data cache size 32 Kbytes Transfer information can be automatically reloaded
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Rohs Verified
4 Configurable Logic Cell (CLC) Modules with user defined logic gate circuits Programmable Pin Select (PPS) for peripheral pin function mapping On-chip temperature sensor with direct ADC Module connection Clock and Power Management On-chip 8 MHz Fast RC (FRC) and 32 kHz Low-Power RC (LPRC) oscillators Programmable PLLs with external oscillator clock sources and Reference Clock Output (REFO) Fail-Safe Clock Monitor (FSCM) with 8 MHz Back-up Fast RC (BFRC) oscillator Low-Power management modes - Sleep, Idle and Doze Integrated Power-on Reset (POR) and Brown-Out Reset (BOR) Debugger Development Support In-Circuit and in application programming and debug support (ICSP) On-chip debug trace buffer and run-time watch with 3 complex and 5 simple breakpoints Safety Features Dead-Man Timer (DMT) safety feature clocked by instruction fetches Watch Dog Timer (WDT) CodeGuard™ security for program FLASH Programmable Cyclic Redundancy Check (CRC) FLASH ECC Fault Injection testing feature ICSP™ write inhibit
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Rohs Verified
System developers designing high-end embedded control applications can benefit from a new Digital Signal Controller (DSC) with two dsPIC DSC cores in a single chip. The dsPIC33CH has one core that is designed to function as a master while the other is designed as a slave. The slave core is useful for executing dedicated, time-critical control code while the master core is busy running the user interface, system monitoring and communications functions, customized for the end application. Operating Conditions 3V to 3.6V, -40°C to +125°C Core: Dual 16-Bit dsPIC33CH CPUs Master Core 90 MIPS and Slave Core 100 MIPS Operation Independent Peripherals for Master Core and Slave Core Configurable Shared Resources for Master Core and Slave Core Programmable PLLs and Oscillator Clock Sources Fast Wake-up and Start-up Backup Internal Oscillator Low-Power Management Modes (Sleep, Idle, Doze) Integrated Power-on Reset and Brown-out Reset Debugger Development Support
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Microchip
Rohs Verified
This plug-in module (PIM) features an 80-pin TQFP device. Features the dsPIC33CK256MP508-I/PT (80-pin TQFP) Enables using the internal OpAmps on the dsPIC with the MCLV-2, MCHV-2, MCHV-3 boards and Low Voltage Motor Control Development Bundle
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Rohs Verified
4 Configurable Logic Cell (CLC) Modules with user defined logic gate circuits Programmable Pin Select (PPS) for peripheral pin function mapping On-chip temperature sensor with direct ADC Module connection Clock and Power Management On-chip 8 MHz Fast RC (FRC) and 32 kHz Low-Power RC (LPRC) oscillators Programmable PLLs with external oscillator clock sources and Reference Clock Output (REFO) Fail-Safe Clock Monitor (FSCM) with 8 MHz Back-up Fast RC (BFRC) oscillator Low-Power management modes - Sleep, Idle and Doze Integrated Power-on Reset (POR) and Brown-Out Reset (BOR) Debugger Development Support In-Circuit and in application programming and debug support (ICSP) On-chip debug trace buffer and run-time watch with 3 complex and 5 simple breakpoints Safety Features Dead-Man Timer (DMT) safety feature clocked by instruction fetches Watch Dog Timer (WDT) CodeGuard™ security for program FLASH Programmable Cyclic Redundancy Check (CRC) FLASH ECC Fault Injection testing feature ICSP™ write inhibit
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Rohs Verified
4 Configurable Logic Cell (CLC) Modules with user defined logic gate circuits Programmable Pin Select (PPS) for peripheral pin function mapping On-chip temperature sensor with direct ADC Module connection Clock and Power Management On-chip 8 MHz Fast RC (FRC) and 32 kHz Low-Power RC (LPRC) oscillators Programmable PLLs with external oscillator clock sources and Reference Clock Output (REFO) Fail-Safe Clock Monitor (FSCM) with 8 MHz Back-up Fast RC (BFRC) oscillator Low-Power management modes - Sleep, Idle and Doze Integrated Power-on Reset (POR) and Brown-Out Reset (BOR) Debugger Development Support In-Circuit and in application programming and debug support (ICSP) On-chip debug trace buffer and run-time watch with 3 complex and 5 simple breakpoints Safety Features Dead-Man Timer (DMT) safety feature clocked by instruction fetches Watch Dog Timer (WDT) CodeGuard™ security for program FLASH Programmable Cyclic Redundancy Check (CRC) FLASH ECC Fault Injection testing feature ICSP™ write inhibit
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Rohs Verified
IC MPU Z180 33MHZ 68PLCC
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Rohs Verified
Microchip’s dsPIC33CK family of digital signal controllers (DSCs) features a single 100 MIPS 16-bit dsPIC® DSC core with integrated DSP and enhanced on-chip peripherals. These DSCs enable the design of high-performance, precision motor control systems that are more energy efficient, quieter in operation and provide extended motor life. They can be used to control BLDC, PMSM, ACIM, SR and stepper motors. 3.0V to 3.6V, -40ºC to +125ºC, DC to 100 MIPS dsPIC33CK DSC Core: Modified Harvard architecture with 16-bit data and 24-bit instructions Code efficient (C and Assembly) CPU architecture designed for real-time applications 16 16-bit working registers 4 sets of interrupt context saving registers, including ACC and CPU status for fast interrupt handling Single-cycle, mixed-sign 32-bit MUL Fast 6-cycle hardware 32/16 and 16/16 DIV Dual 40-bit fixed point Accumulators (ACC) for DSP operations Single-cycle MAC/MPY with dual data fetch and result write-back Zero overhead looping support
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Rohs Verified
Microchip’s dsPIC33CK family of digital signal controllers (DSCs) features a single 100 MIPS 16-bit dsPIC® DSC core with integrated DSP and enhanced on-chip peripherals. These DSCs enable the design of high-performance, precision motor control systems that are more energy efficient, quieter in operation and provide extended motor life. They can be used to control BLDC, PMSM, ACIM, SR and stepper motors. 3.0V to 3.6V, -40ºC to +125ºC, DC to 100 MIPS dsPIC33CK DSC Core: Modified Harvard architecture with 16-bit data and 24-bit instructions Code efficient (C and Assembly) CPU architecture designed for real-time applications 16 16-bit working registers 4 sets of interrupt context saving registers, including ACC and CPU status for fast interrupt handling Single-cycle, mixed-sign 32-bit MUL Fast 6-cycle hardware 32/16 and 16/16 DIV Dual 40-bit fixed point Accumulators (ACC) for DSP operations Single-cycle MAC/MPY with dual data fetch and result write-back Zero overhead looping support
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Microchip
Rohs Verified
The dsPIC33CK256MP508 General Purpose Explorer 16/32 PIM (MA330042) is designed to demonstrate the capabilities of the dsPIC33CK256MP508 family using the Explorer 16 or Explorer 16/32 Development Board. The devices from the dsPIC33CK256P508 family are the first Microchip single core, 16-bit Digital Signal Controllers (DSCs) with 100 MIPS of performance. The dsPIC33CK256MP508 General Purpose Explorer 16/32 PIM features the dsPIC33CK256MP508 80-pin device on the 100-pin Plug-in Module (PIM).
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New Added Items
Added items
NXP MCIMX6Q5EYM10AC, ARM Cortex A9 Microprocessor i.MX6 32bit MPU 1000MHz 624-Pin FCPBGA
i.MX 6 Dual/6 Quad Applications Processors The i.MX 6 Dual/6 Quad Applications Processors feature advanced implementation of the quad ARM® Cortex®-A9 core which operates at speeds up to 1 GHz.The processors include a 64-bit DDR3/LVDDR3/LPDDR2-1066 memory interface as well as other interfaces for connecting WLAN, Bluetooth®, GPS, hard drive, displays and camera sensors. Other key features of the i.MX 6 Dual/6 Quad are 2D and 3D graphics, 3D 1080p video processing and integrated power management. Applications include netbooks, nettops, high-end mobile devices, high-end PDA's, high-end portable media players with HD video capability, gaming consoles and portable navigation devices. Multilevel memory system Smart speed technology Dynamic voltage and frequency scaling Interface flexibility Powerful graphics acceleration Advanced security
Added items
NXP MCIMX6D7CVT08AC, ARM Cortex A9 Microprocessor i.MX6 32bit MPU 850MHz 624-Pin FCPBGA
i.MX 6 Dual/6 Quad Applications Processors The i.MX 6 Dual/6 Quad Applications Processors feature advanced implementation of the quad ARM® Cortex®-A9 core which operates at speeds up to 1 GHz.The processors include a 64-bit DDR3/LVDDR3/LPDDR2-1066 memory interface as well as other interfaces for connecting WLAN, Bluetooth®, GPS, hard drive, displays and camera sensors. Other key features of the i.MX 6 Dual/6 Quad are 2D and 3D graphics, 3D 1080p video processing and integrated power management. Applications include netbooks, nettops, high-end mobile devices, high-end PDA's, high-end portable media players with HD video capability, gaming consoles and portable navigation devices. Multilevel memory system Smart speed technology Dynamic voltage and frequency scaling Interface flexibility Powerful graphics acceleration Advanced security
Added items
Renesas Electronics R7S721000VCFP#AA0, ARM Cortex A9 Microprocessor RZ/A1 32bit ARM, Jazelle 400MHz 256-Pin QFP
The Renesas Electronics RZ/A1H is the premium full-featured part in the RZ/A1 family with an Arm Cortex-A9 core running at 400MHz and 10MB of on-chip SRAM. With 10MB on-chip SRAM, the RZ/A1H supports up to 2 displays with WXGA resolution without the need for external memory. It enables very compact embedded designs without the need to worry about memory procurement and memory EOL. Arm core link level 2 cache controller Media processing engine with NEON technology Data cache size 32 Kbytes Transfer information can be automatically reloaded
Added items
Microchip DSPIC33CK64MP105-I/M4, Microprocessor dsPIC 16bit 100MHz 48-Pin UQFN
4 Configurable Logic Cell (CLC) Modules with user defined logic gate circuits Programmable Pin Select (PPS) for peripheral pin function mapping On-chip temperature sensor with direct ADC Module connection Clock and Power Management On-chip 8 MHz Fast RC (FRC) and 32 kHz Low-Power RC (LPRC) oscillators Programmable PLLs with external oscillator clock sources and Reference Clock Output (REFO) Fail-Safe Clock Monitor (FSCM) with 8 MHz Back-up Fast RC (BFRC) oscillator Low-Power management modes - Sleep, Idle and Doze Integrated Power-on Reset (POR) and Brown-Out Reset (BOR) Debugger Development Support In-Circuit and in application programming and debug support (ICSP) On-chip debug trace buffer and run-time watch with 3 complex and 5 simple breakpoints Safety Features Dead-Man Timer (DMT) safety feature clocked by instruction fetches Watch Dog Timer (WDT) CodeGuard™ security for program FLASH Programmable Cyclic Redundancy Check (CRC) FLASH ECC Fault Injection testing feature ICSP™ write inhibit
Added items
Microchip DSPIC33CK256MP505-I/PT, Microprocessor dsPIC 16bit 100MHz 48-Pin TQFP
Microchip’s dsPIC33CK family of digital signal controllers (DSCs) features a single 100 MIPS 16-bit dsPIC® DSC core with integrated DSP and enhanced on-chip peripherals. These DSCs enable the design of high-performance, precision motor control systems that are more energy efficient, quieter in operation and provide extended motor life. They can be used to control BLDC, PMSM, ACIM, SR and stepper motors. 3.0V to 3.6V, -40ºC to +125ºC, DC to 100 MIPS dsPIC33CK DSC Core: Modified Harvard architecture with 16-bit data and 24-bit instructions Code efficient (C and Assembly) CPU architecture designed for real-time applications 16 16-bit working registers 4 sets of interrupt context saving registers, including ACC and CPU status for fast interrupt handling Single-cycle, mixed-sign 32-bit MUL Fast 6-cycle hardware 32/16 and 16/16 DIV Dual 40-bit fixed point Accumulators (ACC) for DSP operations Single-cycle MAC/MPY with dual data fetch and result write-back Zero overhead looping support
Added items
Microchip Technology MA330042, Microprocessor dsPIC33 16bit 80-Pin TQFP
The dsPIC33CK256MP508 General Purpose Explorer 16/32 PIM (MA330042) is designed to demonstrate the capabilities of the dsPIC33CK256MP508 family using the Explorer 16 or Explorer 16/32 Development Board. The devices from the dsPIC33CK256P508 family are the first Microchip single core, 16-bit Digital Signal Controllers (DSCs) with 100 MIPS of performance. The dsPIC33CK256MP508 General Purpose Explorer 16/32 PIM features the dsPIC33CK256MP508 80-pin device on the 100-pin Plug-in Module (PIM).
Added items
Microchip DSPIC33CK64MP105-I/PT, Microprocessor dsPIC 16bit 100MHz 48-Pin TQFP
16-Bit Digital Signal Controller with High-Speed ADC, Op Amps, Comparators and High-Resolution PWM
Added items
Microchip DSPIC33CK64MP102-I/SS, Microprocessor dsPIC 16bit 100MHz 28-Pin SSOP
4 Configurable Logic Cell (CLC) Modules with user defined logic gate circuits Programmable Pin Select (PPS) for peripheral pin function mapping On-chip temperature sensor with direct ADC Module connection Clock and Power Management On-chip 8 MHz Fast RC (FRC) and 32 kHz Low-Power RC (LPRC) oscillators Programmable PLLs with external oscillator clock sources and Reference Clock Output (REFO) Fail-Safe Clock Monitor (FSCM) with 8 MHz Back-up Fast RC (BFRC) oscillator Low-Power management modes - Sleep, Idle and Doze Integrated Power-on Reset (POR) and Brown-Out Reset (BOR) Debugger Development Support In-Circuit and in application programming and debug support (ICSP) On-chip debug trace buffer and run-time watch with 3 complex and 5 simple breakpoints Safety Features Dead-Man Timer (DMT) safety feature clocked by instruction fetches Watch Dog Timer (WDT) CodeGuard™ security for program FLASH Programmable Cyclic Redundancy Check (CRC) FLASH ECC Fault Injection testing feature ICSP™ write inhibit
Added items
Zilog Z8S18033VSG
IC MPU Z180 33MHZ 68PLCC
Added items
Microchip DSPIC33CK256MP506-I/MR, Microprocessor dsPIC 16bit 100MHz 64-Pin QFN
Microchip’s dsPIC33CK family of digital signal controllers (DSCs) features a single 100 MIPS 16-bit dsPIC® DSC core with integrated DSP and enhanced on-chip peripherals. These DSCs enable the design of high-performance, precision motor control systems that are more energy efficient, quieter in operation and provide extended motor life. They can be used to control BLDC, PMSM, ACIM, SR and stepper motors. 3.0V to 3.6V, -40ºC to +125ºC, DC to 100 MIPS dsPIC33CK DSC Core: Modified Harvard architecture with 16-bit data and 24-bit instructions Code efficient (C and Assembly) CPU architecture designed for real-time applications 16 16-bit working registers 4 sets of interrupt context saving registers, including ACC and CPU status for fast interrupt handling Single-cycle, mixed-sign 32-bit MUL Fast 6-cycle hardware 32/16 and 16/16 DIV Dual 40-bit fixed point Accumulators (ACC) for DSP operations Single-cycle MAC/MPY with dual data fetch and result write-back Zero overhead looping support
Added items
Microchip DSPIC33CK64MP102-I/2N, Microprocessor dsPIC 16bit 100MHz 28-Pin UQFN
4 Configurable Logic Cell (CLC) Modules with user defined logic gate circuits Programmable Pin Select (PPS) for peripheral pin function mapping On-chip temperature sensor with direct ADC Module connection Clock and Power Management On-chip 8 MHz Fast RC (FRC) and 32 kHz Low-Power RC (LPRC) oscillators Programmable PLLs with external oscillator clock sources and Reference Clock Output (REFO) Fail-Safe Clock Monitor (FSCM) with 8 MHz Back-up Fast RC (BFRC) oscillator Low-Power management modes - Sleep, Idle and Doze Integrated Power-on Reset (POR) and Brown-Out Reset (BOR) Debugger Development Support In-Circuit and in application programming and debug support (ICSP) On-chip debug trace buffer and run-time watch with 3 complex and 5 simple breakpoints Safety Features Dead-Man Timer (DMT) safety feature clocked by instruction fetches Watch Dog Timer (WDT) CodeGuard™ security for program FLASH Programmable Cyclic Redundancy Check (CRC) FLASH ECC Fault Injection testing feature ICSP™ write inhibit
Added items
Microchip Technology MA330041-2, Microprocessor dsPIC33 16bit 80-Pin TQFP
This plug-in module (PIM) features an 80-pin TQFP device. Features the dsPIC33CK256MP508-I/PT (80-pin TQFP) Enables using the internal OpAmps on the dsPIC with the MCLV-2, MCHV-2, MCHV-3 boards and Low Voltage Motor Control Development Bundle
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