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Latch ICs | D Latch IC | Enrgtech LTD

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MC74AC573DWG, onsemi

IC LATCH OCTAL 20-SOIC

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Using BiCMOS technology, the MIC5841/5842 integrated circuits were fabricated to be used in a wide variety of peripheral power driver applications. The devices each have an eight-bit CMOS shift register, CMOS control circuitry, eight CMOS data latches, and eight bipolar current-sink Darlington output drivers. These two devices differ only in maximum voltage ratings. The MIC5842 offers premium performance with a minimum output breakdown voltage rating of 80V (50V sustaining). 3.3 MHz Minimum Data-Input Rate CMOS, PMOS, NMOS, TTL Compatible Internal Pull-Up/Pull-Down Resistors Low-Power CMOS Logic and Latches High-Voltage Current-Sink Outputs Output Transient-Protection Diodes 3.3 MHz Minimum Data-Input Rate CMOS, PMOS, NMOS, TTL Compatible Internal Pull-Up/Pull-Down Resistors Low-Power CMOS Logic and Latches High-Voltage Current-Sink Outputs Output Transient-Protection Diodes Single or Split Supply Operation

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MC14044BDG, onsemi

IC LATCH R-S QUAD P/N 16-SOIC

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74HC573D, Toshiba

The 74HC573D is a high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gateC2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. These 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE).When the OE input is high, the eight outputs are in a high impedance state. All inputs are equipped with protection circuits against static discharge or transient excess voltage High speed: tpd = 13 ns (typ.) at VCC = 6.0 V Low power dissipation: ICC = 4.0 μA (max) at Ta = 25  Balanced propagation delays: tPLH ≈ tPHL Wide operating voltage range: VCC(opr) = 2.0 V to 6.0 V

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74LCX573FT, Toshiba

The 74LCX573FT is a high-performance CMOS octal D-type latch. Designed for use in 3.3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The device is designed for low-voltage (3.3 V) VCC applications, but it could be used to interface to 5-V supply environment for both inputs and outputs. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE).When the OE input is high, the eight outputs are in a high-impedance state. All inputs are equipped with protection circuits against static discharge. Low-voltage operation: VCC = 1.65 to 3.6 V High-speed operation: tpd = 8.5 ns (max) (VCC = 3.0 to 3.6 V) Output current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V) Power-down protection provided on all inputs and outputs Pin and function compatible with the 74 series (74LVC/ALVC/ etc.) 573 type

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74HC273D,653, Nexperia

74HC Family Flip-Flops & Latches, Nexperia A range of NXP Flip-Flops and Latches from the 74HC Family of CMOS Logic ICs. The 74HC Family use silicon gate CMOS technology to achieve operating speeds similar to the LSTTL family but with the low power consumption of standard CMOS integrated circuits. High-Speed CMOS Logic Operating Voltage: 2 to 6 V Compatibility: Input CMOS, Output CMOS 74HC Family

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MIC5801YWM, Microchip

Power Latched Drivers, Microchip High-Voltage High-Current Source Driver Array Darlington transistor drivers Low power CMOS latches Output transient protection diodes Ideal for switching high-power loads Hot Swap / Power Controllers, Microchip

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74HC573D,652, Nexperia

74HC Family Flip-Flops & Latches, Nexperia A range of NXP Flip-Flops and Latches from the 74HC Family of CMOS Logic ICs. The 74HC Family use silicon gate CMOS technology to achieve operating speeds similar to the LSTTL family but with the low power consumption of standard CMOS integrated circuits. High-Speed CMOS Logic Operating Voltage: 2 to 6 V Compatibility: Input CMOS, Output CMOS 74HC Family

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74HCT573PW,112, Nexperia

74HCT Family Flip-Flops & Latches, Nexperia High-Speed CMOS Logic Operating Voltage 4.5 to 5.5 V Compatibility: Input TTL, Output CMOS 74HCT Family

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74VHC573FT, Toshiba

The 74VHC573FT is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE). When the OE input is high, the eight outputs are in a high impedance state. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages Wide operating temperature range: Topr = -40 to 125  High speed: fMAX = 180 MHz (typ.) at VCC = 5.0 V Low power dissipation: ICC = 4.0 μA (max) at Ta = 25 High noise immunity: VNIH = VNIL = 28% VCC (min) Power-down protection is provided on all inputs. Balanced propagation delays: tPLH ≈ tPHL Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V Low noise: VOLP = 1.0 V (max) Pin and function compatible with the 74 series (74AC/HC/AHC/LV etc.) 573 type.

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