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Physical Layer Transceivers

Ethernet Physical Layer Devices are 10/100 single port physical layer devices that provide several intelligent power down states with reduced power usage. Physical Layer Devices are designed to accommodate a variety of power modes and have a typical low power consumption rating of 270 mW. They use low-power 3.3V, 0.18m CMOS technology. Due to less power dissipation, low power modes improve overall product reliability. To ensure compatibility and interoperability with all other standards-based Ethernet solutions, the integrated sublayers support both 10BASE-T and 100BASE-TX Ethernet protocols.

Through an external Transformer, physical layer devices connect to twisted pair media. Physical Layer Devices are perfect for high-end peripheral devices, industrial controls, factory automation, automotive and transportation, as well as general embedded applications. They have the industry's highest electrostatic discharge (ESD) protection of 4000V, error-free operation up to 150 meters, and a 48-pin LQFP package (7mm x 7mm).

What is the Purpose of Physical Layer Transceivers?

The physical layer devices point out the means of transmitting a series of raw binary bits or data over a physical data link through communicating network nodes. The bitstream may be put together into code scripts or symbols and transmitted as a physical layer signal which has been caused through a transmission medium.

Features and Benefits

  • RMII Rev. 1.2 Interface (configurable)
  • Low power consumption < 270mW Typical
  • 3.3V MAC Interface
  • 25MHz clock out
  • SNI Interface (configurable)
  • MII Serial Management Interface (MDC and MDIO)
  • Auto-MDIX for 10/100Mb/s
  • Energy Detection Mode
  • IEEE 802.3u MII
  • Low-power 3.3V, 0.18m CMOS technology

What are the Specifications of a Physical Layer Transceiver?

  • DC Output Voltage (VOUT): -0.5V to VCC + 0.5V
  • Storage Temperature (TSTG): -65°C to 150°C
  • DC Input Voltage (VIN): -0.5V to VCC + 0.5V
  • Lead Temperature. (TL) (Soldering, 10 sec.): 260°C
  • Supply Voltage (VCC): -0.5V to 4.2V (max.)
  • ESD Rating (RZAP = 1.5k, CZAP = 100pF): 4.0kV
  • Power Dissipation (PD): 267mW

What are the Applications of Physical Layer Transceivers?

  • Automotive/Transportation Systems
  • Industrial Controls and Factory Automation Devices
  • High-End Communicating Devices
  • Devices for General Embedded Applications

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KSZ8081MLXCA-TR, Microchip
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KSZ8091RNBCA, Microchip
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KSZ9031RNXCC, Microchip
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£ 2.28
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KSZ9897RTXI, Microchip
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KSZ8041FTLI, Microchip
472 In Stock
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KSZ8081RNDCA-TR, Microchip
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Renesas Electronics
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82P2282PFG, Renesas Electronics
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LAN8700IC-AEZG, Microchip
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KSZ8041TL, Microchip
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KSZ8081RNBCA-TR, Microchip
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KSZ8091RNAIA-TR, Microchip
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KSZ8081RNACA-TR, Microchip
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KSZ8081RNBIA-TR, Microchip
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KSZ9031RNXIC, Microchip
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KSZ8081RNAIA-TR, Microchip
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KSZ8081MLXIA, Microchip
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KSZ8081MNXIA-TR, Microchip
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KSZ9021RNI, Microchip
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KSZ8081MLXIA-TR, Microchip
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KSZ8081MNXCA-TR, Microchip
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LAN83C185-JT, Microchip
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LAN8670B1-E/LMX, Microchip
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LAN8672B1-E/LNX, Microchip
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LAN8671B1-E/U3B, Microchip
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KSZ8721BLI, Microchip
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LAN8670B1-E/LMX, Microchip

LAN8670B1-E/LMX, Microchip

The Microchip LAN8670 is a compact, low power, and cost-effective single-port 10BASE-T1S Ethernet physical layer transceiver designed according to the IEEE Std 802.3cg-2019 specification. High-performance 10BASE-T1S Ethernet PHY Designed according to IEEE Std 802.3cg-2019
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KSZ8721BLI, Microchip

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The KSZ9031 reduces board cost and simplifies board layout by using on-chip termination resistors for the four differential pairs and by integrating an LDO controller to drive a low-cost MOSFET to supply the 1.2V core. Single-chip 10/100/1000Mbps Ethernet transceiver KSZ9031Mxx feature GMII/MII standard interface with 3.3V/2.5V/1.8V tolerant I/Os KSZ9031Rxx feature RGMII timing supports on-chip delay according to RGMII Version 2.0, with programming options for external delay and making adjustments and corrections to TX and RX timing paths GMII/MII/RGMII with 3.3V/2.5V/1.8V tolerant I/Os Auto-negotiation to automatically select the highest linkup speed (10/100/1000Mbps) and duplex (half/full) On-chip termination resistors for the differential pairs On-chip LDO controller to support single 3.3V supply operation – requires only one external FET to generate 1.2V for the core Jumbo frame support up to 16KB 125MHz Reference Clock Output Energy-detect power-down mode
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KSZ8041NLI-TR, Microchip

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KSZ8001L, Micrel

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KSZ8721CL, Microchip

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KSZ8041FTLI, Microchip

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KSZ8081RNDCA-TR, Microchip

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The KSZ8081 is a single-supply 10Base-T/100Base-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair (UTP) cable. The KSZ8081 is a highly-integrated PHY solution. Ethernet transceiver MII interface support (KSZ8081MNX) RMII v1.2 Interface support with a 50MHz reference clock output to MAC, and an option to input a 50MHz reference clock (KSZ8081RNB) RMII back-to-back mode support for a 100Mbps copper repeater MDC/MDIO management interface for PHY register configuration Programmable interrupt output LED outputs for link and activity status indication On-chip termination resistors for the differential pairs Baseline wander correction HP Auto MDI/MDI-X to reliably detect and correct straight-through and crossover cable connections with disable and enable option Auto-negotiation to automatically select the highest linkup speed (10/100Mbps) and duplex (half/full)
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82P2282PFG, Renesas Electronics

82P2282PFG, Renesas Electronics

The Renesas Electronics transceiver is a highly featured single device solution for T1/E1/J1 trunks. Each link of the IDT82P2282 can be independently configured. The configuration is performed through an SPI or parallel microprocessor interface. In the receive path, the signals from the line side are coupled into the RTIPn and RRINGn pins and pass through an Impedance Terminator. In T1/J1 Mode, the recovered data and clock of each link can be configured in Super Frame (SF), Extended Super Frame (ESF), T1 Digital Multiplexer (DM) or Switch Line Carrier - 96 (SLC-96) formats. On the system side, if the device is in T1/J1 mode, the data stream of 1.544 Mbit/s can be converted to/from the data stream of 2.048 Mbit/s by software configuration. In the transmit path, the Transmit System Interface inputs the signals with various operating modes. For line interface each link can be configured as T1, E1 or J1 Line interface supports T1/E1/J1 long haul/short haul line interface HPS for 1+1 protection without external relays Selectable internal line termination impedance provided It supports AMI/B8ZS for T1/J1 and AMI/HDB3 for E1 line encoding/decoding It provides T1/E1/J1 short haul pulse templates It supports G.772 non-intrusive monitoring It supports T1.102 line monitor Transmit line has short-circuit detection and protection Separate Transmit and Receive Jitter Attenuators 2 per link provided Each receiver and transmitter can be individually powered down
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KSZ8721BL-TR, Microchip

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KSZ8081RNBCA-TR, Microchip

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