The Renesas Electronics IDT570 is a high-performance Zero Delay Buffer (ZDB) which integrates IDT's proprietary analog/digital Phase Locked Loop (PLL) techniques. The A version is recommended for 5 V designs and the B version for 3.3 V designs. The chip is part of IDT's ClockBlocks™ family, and was designed as a performance upgrade to meet today's higher speed and lower voltage requirements. The zero delay feature means that the rising edge of the input clock aligns with the rising edges of both output clocks, giving the appearance of no delay through the device. There are two outputs on the chip, one being a low-skew divide by two of the other output.
Functional equivalent to AV9170 (not a pin-for-pin replacement).
Low input to output skew of 300 ps max (>60 MHz outputs)
Low skew (100ps) outputs. One is ÷ 2 of other
Ability to choose between 14 different multipliers from 0.5X to 32X
Output clock frequency up to 168 MHz at 3.3 V
Can recover degraded input clock duty cycle
